Hardware specification, verification, and synthesis
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Hardware specification, verification, and synthesis Mathematical aspects : proceedings by Cornell University. Mathematical Sciences Institute. Workshop

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Published by Springer-Verlag in Berlin, New York .
Written in English

Subjects:

  • Integrated circuits -- Very large scale integration -- Design and construction -- Data processing -- Congresses,
  • Integrated circuits -- Verification -- Congresses

Book details:

Edition Notes

Includes bibliographical notes.

StatementM. Leeser, G. Brown, eds. ; Mathematical Sciences Institute workshop, Cornell University Ithaca, New York, USA, July 5-7, 1989 proceedings.--
SeriesLecture notes in computer science ;, 408
ContributionsLeeser, M. 1958-, Brown, G. 1960-, Cornell University. Mathematical Sciences Institute.
Classifications
LC ClassificationsTK7874 .C685 1989
The Physical Object
Paginationvi, 402 p. :
Number of Pages402
ID Numbers
Open LibraryOL2204440M
ISBN 100387972269
LC Control Number89026300

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Introduction to Hardware-Software Co-Design presents a number of issues of fundamental importance for the design of integrated hardware software products such as embedded, communication, and multimedia systems. This book is a comprehensive introduction to the fundamentals of hardware/software co-design. Co-design is still a new field but one which has substantially matured 2/5(3). Braibant et al. presented formal verification of hardware synthesis [6], The Verification of a Bit-slice ALU Hardware Specification, Verification and Synthesis The book splits across. This paper describes a novel technique for the synthesis of imperative programs. Automated program synthesis has the potential to make programming and design of systems easier by allowing the programs to be specified at a higher-level than executable code. In our approach, which we call proof-theoretic synthesis, the user provides an input-output functional specification, a [ ]. High-level synthesis (HLS), sometimes referred to as C synthesis, electronic system-level (ESL) synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that interprets an algorithmic description of a desired behavior and creates digital hardware that implements that behavior. Synthesis begins with a high-level specification of the problem, where behavior is.